return 0;
bad3:
ieee80211_ifdetach(ic);
-@@ -2349,16 +2352,6 @@
- }
- if (status & HAL_INT_MIB) {
- sc->sc_stats.ast_mib++;
-- /* When the card receives lots of PHY errors, the MIB
-- * interrupt will fire at a very rapid rate. We will use
-- * a timer to enforce at least 1 jiffy delay between
-- * MIB interrupts. This should be unproblematic, since
-- * the hardware will continue to update the counters in
-- * the mean time. */
-- sc->sc_imask &= ~HAL_INT_MIB;
-- ath_hal_intrset(ah, sc->sc_imask);
-- mod_timer(&sc->sc_mib_enable, jiffies + 1);
--
- /* Let the HAL handle the event. */
- ath_hal_mibevent(ah, &sc->sc_halstats);
- }
-@@ -2428,6 +2421,43 @@
+@@ -2428,6 +2431,43 @@
return flags;
}
/*
* Context: process context
*/
-@@ -2493,8 +2523,7 @@
+@@ -2493,8 +2533,7 @@
if (sc->sc_softled)
ath_hal_gpioCfgOutput(ah, sc->sc_ledpin);
/*
* This is needed only to setup initial state
-@@ -2530,7 +2559,7 @@
+@@ -2530,7 +2569,7 @@
* Enable MIB interrupts when there are hardware phy counters.
* Note we only do this (at the moment) for station mode.
*/
sc->sc_imask |= HAL_INT_MIB;
ath_hal_intrset(ah, sc->sc_imask);
-@@ -2787,9 +2816,7 @@
+@@ -2787,9 +2826,7 @@
EPRINTF(sc, "Unable to reset hardware: '%s' (HAL status %u)\n",
ath_get_hal_status_desc(status), status);
ath_update_txpow(sc); /* update tx power state */
ath_radar_update(sc);
ath_setdefantenna(sc, sc->sc_defant);
-@@ -4174,6 +4201,8 @@
+@@ -4174,6 +4211,8 @@
if (sc->sc_nmonvaps > 0)
rfilt |= (HAL_RX_FILTER_CONTROL | HAL_RX_FILTER_BEACON |
HAL_RX_FILTER_PROBEREQ | HAL_RX_FILTER_PROM);
if (sc->sc_curchan.privFlags & CHANNEL_DFS)
rfilt |= (HAL_RX_FILTER_PHYERR | HAL_RX_FILTER_PHYRADAR);
return rfilt;
-@@ -6524,9 +6553,6 @@
+@@ -6524,9 +6563,6 @@
rs->rs_rssi = 0;
len = rs->rs_datalen;
if (rs->rs_more) {
/*
-@@ -8874,9 +8900,7 @@
+@@ -8874,9 +8910,7 @@
if (sc->sc_softled)
ath_hal_gpioCfgOutput(ah, sc->sc_ledpin);
sc->sc_curchan = hchan;
ath_update_txpow(sc); /* update tx power state */
ath_radar_update(sc);
-@@ -10653,9 +10677,54 @@
+@@ -10653,9 +10687,54 @@
ATH_RP_IGNORED = 24,
ATH_RADAR_IGNORED = 25,
ATH_MAXVAPS = 26,
ATH_SYSCTL_DECL(ath_sysctl_halparam, ctl, write, filp, buffer, lenp, ppos)
{
struct ath_softc *sc = ctl->extra1;
-@@ -10841,6 +10910,11 @@
+@@ -10841,6 +10920,11 @@
case ATH_RADAR_IGNORED:
sc->sc_radar_ignored = val;
break;
default:
ret = -EINVAL;
break;
-@@ -10907,6 +10981,11 @@
+@@ -10907,6 +10991,11 @@
case ATH_RADAR_IGNORED:
val = sc->sc_radar_ignored;
break;
default:
ret = -EINVAL;
break;
-@@ -11084,6 +11163,24 @@
+@@ -11084,6 +11173,24 @@
.proc_handler = ath_sysctl_halparam,
.extra2 = (void *)ATH_RADAR_IGNORED,
},
--- a/ath/if_ath.c
+++ b/ath/if_ath.c
-@@ -8322,6 +8322,14 @@
+@@ -8332,6 +8332,14 @@
#endif
if (ts->ts_status & HAL_TXERR_XRETRY) {
sc->sc_stats.ast_tx_xretries++;
--- a/ath/if_ath.c
+++ b/ath/if_ath.c
-@@ -4915,7 +4915,7 @@
+@@ -4925,7 +4925,7 @@
* capability info and arrange for a mode change
* if needed.
*/
MODULE_PARM_DESC(autocreate, "Create ath device in "
"[sta|ap|wds|adhoc|ahdemo|monitor] mode. defaults to sta, use "
"'none' to disable");
-@@ -5062,7 +5066,7 @@
+@@ -5072,7 +5076,7 @@
DPRINTF(sc, ATH_DEBUG_BEACON_PROC,
"Missed %u consecutive beacons (n_beacon=%u)\n",
sc->sc_bmisscount, n_beacon);
ATH_SCHEDULE_TQUEUE(&sc->sc_bstucktq, needmark);
return;
}
-@@ -5218,7 +5222,7 @@
+@@ -5228,7 +5232,7 @@
* check will be true, in which case return
* without resetting the driver.
*/
/* override with driver methods */
vap = &avp->av_vap;
avp->av_newstate = vap->iv_newstate;
-@@ -4199,8 +4201,7 @@
+@@ -4209,8 +4211,7 @@
if (ic->ic_opmode == IEEE80211_M_STA ||
sc->sc_opmode == HAL_M_IBSS || /* NB: AHDEMO too */
(sc->sc_nostabeacons) || sc->sc_scanning ||
rfilt |= HAL_RX_FILTER_BEACON;
if (sc->sc_nmonvaps > 0)
rfilt |= (HAL_RX_FILTER_CONTROL | HAL_RX_FILTER_BEACON |
-@@ -9020,8 +9021,6 @@
+@@ -9030,8 +9031,6 @@
* set sc->beacons if we might need to restart
* them after ath_reset. */
if (!sc->sc_beacons &&
--- a/ath/if_ath.c
+++ b/ath/if_ath.c
-@@ -5474,6 +5474,9 @@
+@@ -5484,6 +5484,9 @@
ath_beacon_dturbo_config(vap, intval &
~(HAL_BEACON_RESET_TSF | HAL_BEACON_ENA));
#endif
static int ath_desc_alloc(struct ath_softc *);
static void ath_desc_free(struct ath_softc *);
static void ath_desc_swap(struct ath_desc *);
-@@ -2783,6 +2784,72 @@
+@@ -2793,6 +2794,72 @@
return 1;
}
/*
* Reset the hardware w/o losing operational state. This is
* basically a more efficient way of doing ath_stop, ath_init,
-@@ -5282,6 +5349,7 @@
+@@ -5292,6 +5359,7 @@
u_int64_t tsf, hw_tsf;
u_int32_t tsftu, hw_tsftu;
u_int32_t intval, nexttbtt = 0;
int reset_tsf = 0;
if (vap == NULL)
-@@ -5289,6 +5357,9 @@
+@@ -5299,6 +5367,9 @@
ni = vap->iv_bss;
hw_tsf = ath_hal_gettsf64(ah);
tsf = le64_to_cpu(ni->ni_tstamp.tsf);
hw_tsftu = hw_tsf >> 10;
-@@ -5478,15 +5549,27 @@
+@@ -5488,15 +5559,27 @@
<= ath_hal_sw_beacon_response_time)
nexttbtt += intval;
sc->sc_nexttbtt = nexttbtt;
sc->sc_bmisscount = 0;
ath_hal_intrset(ah, sc->sc_imask);
+
-+ if (ath_hw_check_atim(sc, 1, intval & HAL_BEACON_PERIOD)) {
++ if ((sc->sc_opmode == HAL_M_IBSS) && ath_hw_check_atim(sc, 1, intval & HAL_BEACON_PERIOD)) {
+ DPRINTF(sc, ATH_DEBUG_BEACON,
+ "fixed atim window after beacon init\n");
+ }
/* We print all debug messages here, in order to preserve the
* time critical aspect of this function */
DPRINTF(sc, ATH_DEBUG_BEACON,
-@@ -6389,6 +6472,11 @@
+@@ -6399,6 +6482,11 @@
DPRINTF(sc, ATH_DEBUG_BEACON,
"Updated beacon timers\n");
}
-+ if ((sc->sc_opmode == IEEE80211_M_IBSS) &&
++ if ((sc->sc_opmode == HAL_M_IBSS) &&
+ IEEE80211_ADDR_EQ(ni->ni_bssid, vap->iv_bss->ni_bssid) &&
+ ath_hw_check_atim(sc, 1, vap->iv_bss->ni_intval)) {
+ DPRINTF(sc, ATH_DEBUG_ANY, "Fixed ATIM window after beacon recv\n");
--- a/ath/if_ath.c
+++ b/ath/if_ath.c
-@@ -6409,7 +6409,7 @@
+@@ -6440,7 +6440,7 @@
/* Never copy the SKB, as it is ours on the RX side, and this is the
* last process on the TX side and we only modify our own headers. */
if (tskb == NULL) {
DPRINTF(sc, ATH_DEBUG_ANY,
"Dropping; ath_skb_removepad failed!\n");
-@@ -6417,6 +6417,8 @@
+@@ -6448,6 +6448,8 @@
}
ieee80211_input_monitor(ic, tskb, bf, tx, tsf, sc);
Please let us know if you think your name should be mentioned here!
--- a/ath/if_ath.c
+++ b/ath/if_ath.c
-@@ -3029,7 +3029,7 @@
+@@ -3059,7 +3059,7 @@
struct ath_softc *sc = dev->priv;
struct ath_hal *ah = sc->sc_ah;
struct ieee80211_phy_params *ph = (struct ieee80211_phy_params *)
/*
* Check if the MAC has multi-rate retry support.
* We do this by trying to setup a fake extended
-@@ -7382,7 +7390,7 @@
+@@ -7453,7 +7461,7 @@
if (qtype == HAL_TX_QUEUE_UAPSD)
qi.tqi_qflags = HAL_TXQ_TXDESCINT_ENABLE;
else